(a) Field of the Invention
The present invention relates to a semiconductor device, and more particularly it pertains to a field effect transistor which is suitable for high speed switching operation and which can serve as a substitute of a bipolar transistor, and it further concerns an integrated circuit structure including same.
(b) Description of the Prior Art
Conventional integrated logic circuits having high speed capability are mainly formed with bipolar transistors. Among the known structures, there are integrated injection logic (IIL), emitter-coupled logic (ECL), transistor-transistor logic (TTL), diode-transistor logic (DTL), resistor-transistor logic (RTL), emitter-follower logic (EFL), and non-threshold logic (NTL).
Also bipolar semiconductor memories such as dynamic random access memory (D-RAM), static random access memory (S-RAM), read-only memory (ROM) are known.
Bipolar transistors, however, have such properties that the capacitance formed between the collector and the base and the capacitance formed between the base and the emitter are both large, that the reduction of the base resistance is limited and also that the minority carrier storage effect is unavoidable in a deep saturation operation. These inherent properties of a bipolar transistor undesirably limit the operation speed of the bipolar integrated circuit which is formed with such bipolar transistor. Furthermore, since the power dissipation in a bipolar transistor is relatively large, the power-delay product p.tau. is accordingly large theoretically. At the present stage, among the known high speed bipolar integrated logic circuits, TTL, ECL and NTL circuits can exhibit a minimum delay time in the range of from about 0.1 to about 1 nano-sec at the current state of technique, and accompanied at such occation by a power-delay product p.tau. of about several to about one hundred pico-joules per gate, whereas IIL provides a minimum power-delay product p.tau. in the range of from about 0.1 to about 1 pico-joule per gate, and is accompanied at such an occasion by a delay time .tau. being in the order of 50 10 nano-sec. In the semiconductor memories using bipolar transistors, a relatively large power is required for writing and reading addresses for the similar reasons.
The static induction transistor (SIT) proposed by the present invention is fundamentally a kind of unipolar transistor, and has the distinguishing properties that the parasitic capacitances are small, that the gate resistance which may correspond to the base resistance can be very small, that charge carriers are basically drifted by an electric field, that the space charge storage effect is negligibly small, that low noise and high gain operation is possible, and that a non-saturating drain current vs. drain voltage characteristic can be exhibited at least in a portion of the operative range of the transistor irrespective of the magnitude of the gate bias voltage applied, particularly in the reverse gate bias operation. Further information of the static induction transistor may be found in U.S. patent application Ser. Nos. 817,052 filed July 19, 1977, by Nishizawa and 576,541 U.S. Pat. No. Re. 29,971 by Nishizawa et al and in the paper appearing in "IEEE Trans. Electron Devices" ED-22, 185 (1975), which mainly describe the reverse gate bias operation of junction gate SIT. Furthermore, the application of the static induction transistor to integrated circuits, especially of IIL type, was proposed in abandoned U.S. patent application Ser. Nos. 748,292 filed Dec. 7, 1976 and 812,738 filed July 5, 1977. However, the developments of the static induction transistor which have been made heretofore are concentrated mainly on those devices which are operative under a reverse gate bias, and hence such SIT's cannot be substituted for bipolar transistors.
Furthermore, there has also been proposed a bipolar transistor in which the base region is punched through especially at the application of a high collector voltage. This bipolar punch-through transistor shows an unsaturating drain current vs. drain voltage characteristic in same bias condition. However, the punch-through transistor has been considered rather as a faulty product or an impractical device from the usual concept of saturating-type bipolar transistors. Thus, no positive development has been accomplished with respect to the utility of the punch-through transistors.